delta/coreboot/coreboot.git/src/include/console, branch master

console: Add format-checking __printf() to die()

2023-05-17T11:23:59+00:00

Code changes are necessary because `-Wformat` warns about empty
format strings by default.

Change-Id: Ic8021b70f4cd4875b06f196f88b84940c9a79fe0
Signed-off-by: Nico Huber 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75147
Reviewed-by: Jérémy Compostella 
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Arthur Heymans

console: Add SimNow console logging

2023-02-09T10:01:20+00:00

The AMD SimNow tool supports fast logging through an IO port.  Add a new
console to support SimNow logging through port 80.

TEST=observe significant speed improvements on SimNow console log

Signed-off-by: Fred Reitberger 
Change-Id: I42a431f48ea14ba4adacbd4a32e15abe7c5e4951
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72751
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by: Felix Held

treewide: Add 'IWYU pragma: export' comment

2022-11-03T13:05:17+00:00

This pragma says to IWYU (Include What You Use) that the current file
is supposed to provide commented headers.

Change-Id: I482c645f6b5f955e532ad94def1b2f74f15ca908
Signed-off-by: Elyes Haouas 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68332
Tested-by: build bot (Jenkins) 
Reviewed-by: Werner Zeh

console: Add an SoC-specific post-code call

2022-10-25T17:15:58+00:00

Add a post-code call that SoCs can hook to output or save in any way
that is specific to that SoC.

Signed-off-by: Martin Roth 
Change-Id: I0369e4362840d7506d301105d8e1e2fd865919f4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68545
Tested-by: build bot (Jenkins) 
Reviewed-by: Julius Werner

drivers/smbus: add smbus console driver

2022-09-16T17:01:17+00:00

This patch adds a new smbus console driver and Kconfig
options to enable the driver.

Change-Id: Ife77fb2c3e1cc77678a4972701317d50624ceb95
Signed-off-by: Husni Faiz 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67339
Reviewed-by: Raul Rangel 
Tested-by: build bot (Jenkins)

include: Add SPDX-License-Identifiers to files missing them

2022-08-01T13:59:11+00:00

This adds SPDX-License-Identifiers to all of the files in src/include
that are missing them or have unrecognized identifiers.

Files that were written specifically for coreboot and don't have license
information are licensed GPL-2.0-only, which is the license for the
overall coreboot project.

Files that were sourced from Linux are similarly GPL-2.0-only.

The cpu/power files were committed with source that was licensed as
GPL-2.0-or-later, so presumably that's the license for that entire
commit.

The final file, vbe.h gives a pointer to the BSD-2-Clause license
at opensource.org.

Change-Id: I3f8fd7848ce11c1a0060e05903fb17a7583b4725
Signed-off-by: Martin Roth 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66284
Tested-by: build bot (Jenkins) 
Reviewed-by: Elyes Haouas 
Reviewed-by: Arthur Heymans 
Reviewed-by: Felix Singer

cpu/x86/smm,lib/cbmem_console: Enable CBMEMC when using DEBUG_SMI

2022-03-09T14:26:26+00:00

This change will allow the SMI handler to write to the cbmem console
buffer. Normally SMIs can only be debugged using some kind of serial
port (UART). By storing the SMI logs into cbmem we can debug SMIs using
`cbmem -1`. Now that these logs are available to the OS we could also
verify there were no errors in the SMI handler.

Since SMM can write to all of DRAM, we can't trust any pointers
provided by cbmem after the OS has booted. For this reason we store the
cbmem console pointer as part of the SMM runtime parameters. The cbmem
console is implemented as a circular buffer so it will never write
outside of this area.

BUG=b:221231786
TEST=Boot non-serial FW with DEBUG_SMI and verified SMI messages are
visible when running `cbmem -1`. Perform a suspend/resume cycle and
verify new SMI events are written to the cbmem console log.

Signed-off-by: Raul E Rangel 
Change-Id: Ia1e310a12ca2f54210ccfaee58807cb808cfff79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62355
Tested-by: build bot (Jenkins) 
Reviewed-by: Karthik Ramasubramanian

console: Add compile-time fast path when only CBMEM console is used

2022-02-07T23:28:46+00:00

A common use case when running coreboot on production systems is that
only the CBMEM console (the one with the least impact on boot speed) is
enabled. In this case, some of the code in the console subsystem has no
effect. Due to the way it's all genericized over multiple consoles and
tied together with function pointers, not all of this can be
compile-time eliminated automatically, so this patch adds a little
helper to facilitate that. This results in roughly 200 (compressed)
bytes of savings per stage on an arm64 system.

Signed-off-by: Julius Werner 
Change-Id: I1d5b8bda80d02a13ee0b7835e0805c4319fd21d8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61613
Tested-by: build bot (Jenkins) 
Reviewed-by: Raul Rangel

console: Add loglevel prefix to interactive consoles

2022-02-07T14:11:44+00:00

In an attempt to make loglevels more visible (and therefore useful,
hopefully), this patch adds a prefix indicating the log level to every
line sent to an "interactive" console (such as a UART). If the code
contains a `printk(BIOS_DEBUG, "This is a debug message!\n"), it will
now show up as

  [DEBUG]  This is a debug message!

on the UART output.

"Stored" consoles (such as in CBMEM) will get a similar but more
space-efficient feature in a later CL.

Signed-off-by: Julius Werner 
Change-Id: Ic83413475400821f8097ef1819a293ee8926bb0b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61306
Tested-by: build bot (Jenkins) 
Reviewed-by: Raul Rangel

lib/cbmem_console: Add cbmemc_copy_in function

2022-01-23T16:42:38+00:00

When running in verstage before bootblock, the PSP (ARM co-processor) is
running with limited SRAM. It needs to stash the verstage console data
internally until DRAM is brought up. Once DRAM is brought up the data is
stashed in a "transfer buffer" region. In the current design, we are
using the same region for the transfer buffer and the
preram_cbmem_console region. This has the following downsides:

1) The pre-x86 buffer needs to be large enough to hold all the
   verstage, bootblock and romstage console logs.
2) On AMD platforms, the PSP verstage is signed. Changing the size of
   preram_cbmem_console after the fact will result in a mismatch of the
   transfer buffer between verstage and bootblock.

This CL adds a new method that allows SoC specific code to copy the
CBMEM console in the transfer buffer to the active CBMEM console.

BUG=b:213828947
TEST=Boot guybrush and no longer see
   *** Pre-CBMEM romstage console overflowed, log truncated!

Signed-off-by: Raul E Rangel 
Change-Id: Idc0ab8090db740e0d1b3d21d8968f26471f2e930
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61099
Tested-by: build bot (Jenkins) 
Reviewed-by: Kangheui Won 
Reviewed-by: Julius Werner