#6414: clarify description of processor endianness.

Text by Alexey Shamrin; I changed 'DEC Alpha' to the more relevant 'Intel Itanium'.

1 files changed, 5 insertions, 3 deletions

diff --git a/Doc/library/struct.rst b/Doc/library/struct.rst
index d29bd7bb77..a115c1d026 100644
--- a/Doc/library/struct.rst
+++ b/Doc/library/struct.rst
@@ -187,9 +187,11 @@ following table:
 
 If the first character is not one of these, ``'@'`` is assumed.
 
-Native byte order is big-endian or little-endian, depending on the host system.
-For example, Motorola and Sun processors are big-endian; Intel and DEC
-processors are little-endian.
+Native byte order is big-endian or little-endian, depending on the host
+system. For example, Intel x86 and AMD64 (x86-64) are little-endian;
+Motorola 68000 and PowerPC G5 are big-endian; ARM and Intel Itanium feature
+switchable endianness (bi-endian). Use ``sys.byteorder`` to check the
+endianness of your system.
 
 Native size and alignment are determined using the C compiler's
 ``sizeof`` expression.  This is always combined with native byte order.