diff options
| author | Georg Brandl <georg@python.org> | 2010-05-19 14:12:57 +0000 |
|---|---|---|
| committer | Georg Brandl <georg@python.org> | 2010-05-19 14:12:57 +0000 |
| commit | f5dec8e9efd2bc756831f23b30158046eb5883ac (patch) | |
| tree | 599da5d7bf49510d9d24dfa5298e3ea5aa0b9d1b /Doc/library/struct.rst | |
| parent | 5296e4b5b3f9ce656307ed7aaeaf49b313be6873 (diff) | |
| download | cpython-git-f5dec8e9efd2bc756831f23b30158046eb5883ac.tar.gz | |
Merged revisions 78297,78308 via svnmerge from
svn+ssh://pythondev@svn.python.org/python/trunk
........
r78297 | andrew.kuchling | 2010-02-22 03:29:10 +0100 (Mo, 22 Feb 2010) | 1 line
#7076: mention SystemRandom class near start of the module docs; reword change description for clarity. Noted by Shawn Ligocki.
........
r78308 | andrew.kuchling | 2010-02-22 16:13:17 +0100 (Mo, 22 Feb 2010) | 2 lines
#6414: clarify description of processor endianness.
Text by Alexey Shamrin; I changed 'DEC Alpha' to the more relevant 'Intel Itanium'.
........
Diffstat (limited to 'Doc/library/struct.rst')
| -rw-r--r-- | Doc/library/struct.rst | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/Doc/library/struct.rst b/Doc/library/struct.rst index d29bd7bb77..a115c1d026 100644 --- a/Doc/library/struct.rst +++ b/Doc/library/struct.rst @@ -187,9 +187,11 @@ following table: If the first character is not one of these, ``'@'`` is assumed. -Native byte order is big-endian or little-endian, depending on the host system. -For example, Motorola and Sun processors are big-endian; Intel and DEC -processors are little-endian. +Native byte order is big-endian or little-endian, depending on the host +system. For example, Intel x86 and AMD64 (x86-64) are little-endian; +Motorola 68000 and PowerPC G5 are big-endian; ARM and Intel Itanium feature +switchable endianness (bi-endian). Use ``sys.byteorder`` to check the +endianness of your system. Native size and alignment are determined using the C compiler's ``sizeof`` expression. This is always combined with native byte order. |