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authorXavier Clerc <xclerc@janestreet.com>2017-09-19 13:31:43 +0100
committerXavier Clerc <xclerc@janestreet.com>2017-09-19 13:31:43 +0100
commit8756b0bc585680a2c4bee58ed9fe57393c151d61 (patch)
tree94a19f48b2c508af224a9b01a4a4c160643288c9
parent62ba55dd49b33c5e4f50342c3ed4f72f17f0f5d7 (diff)
downloadocaml-8756b0bc585680a2c4bee58ed9fe57393c151d61.tar.gz
Add a note explaining the bug and its fix.
-rw-r--r--asmcomp/linscan.ml6
1 files changed, 5 insertions, 1 deletions
diff --git a/asmcomp/linscan.ml b/asmcomp/linscan.ml
index 24fdc7ca09..46d26fc36a 100644
--- a/asmcomp/linscan.ml
+++ b/asmcomp/linscan.ml
@@ -97,7 +97,11 @@ let allocate_free_register i =
| rn ->
let ci = active.(cl) in
let r0 = Proc.first_available_register.(cl) in
- (* Create register mask for this class *)
+ (* Create register mask for this class
+ note: if frame pointers are enabled then some registers may have
+ indexes that are off-bounds; we hence protect write accesses
+ below (given that the assign function will not consider such
+ registers) *)
let regmask = Array.make rn true in
(* Remove all assigned registers from the register mask *)
List.iter