From the SMBIOS spec (v2.6.1):
3.3.8 Cache Information (Type 7): The information in this structure defines
the attributes of CPU cache device in the system. One structure is specified
for each such device, whether the device is internal to or external to the
CPU module. Cache modules can be associated with a processor structure in one
or two ways depending on the SMBIOS version, see 3.3.5 Processor Information
(Type 4) on page 25 and 3.3.15 Group Associations (Type 14) on page 46 for more
information.
Implementation mostly borrowed from the dmidecode project.
Signed-off-by: Pierre-Alexandre Meyer <pierre@mouraf.org>