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author | Lorry Tar Creator <lorry-tar-importer@lorry> | 2015-05-20 09:56:07 +0000 |
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committer | Lorry Tar Creator <lorry-tar-importer@lorry> | 2015-05-20 09:56:07 +0000 |
commit | 41386e9cb918eed93b3f13648cbef387e371e451 (patch) | |
tree | a97f9d7bd1d9d091833286085f72da9d83fd0606 /Source/JavaScriptCore/assembler/MacroAssemblerARM64.h | |
parent | e15dd966d523731101f70ccf768bba12435a0208 (diff) | |
download | WebKitGtk-tarball-41386e9cb918eed93b3f13648cbef387e371e451.tar.gz |
webkitgtk-2.4.9webkitgtk-2.4.9
Diffstat (limited to 'Source/JavaScriptCore/assembler/MacroAssemblerARM64.h')
-rw-r--r-- | Source/JavaScriptCore/assembler/MacroAssemblerARM64.h | 244 |
1 files changed, 33 insertions, 211 deletions
diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h b/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h index c82585952..a128923fc 100644 --- a/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h +++ b/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012, 2014 Apple Inc. All rights reserved. + * Copyright (C) 2012 Apple Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -34,7 +34,7 @@ namespace JSC { -class MacroAssemblerARM64 : public AbstractMacroAssembler<ARM64Assembler, MacroAssemblerARM64> { +class MacroAssemblerARM64 : public AbstractMacroAssembler<ARM64Assembler> { static const RegisterID dataTempRegister = ARM64Registers::ip0; static const RegisterID memoryTempRegister = ARM64Registers::ip1; static const ARM64Registers::FPRegisterID fpTempRegister = ARM64Registers::q31; @@ -64,11 +64,13 @@ public: Vector<LinkRecord, 0, UnsafeVectorOverflow>& jumpsToLink() { return m_assembler.jumpsToLink(); } void* unlinkedCode() { return m_assembler.unlinkedCode(); } - static bool canCompact(JumpType jumpType) { return ARM64Assembler::canCompact(jumpType); } - static JumpLinkType computeJumpType(JumpType jumpType, const uint8_t* from, const uint8_t* to) { return ARM64Assembler::computeJumpType(jumpType, from, to); } - static JumpLinkType computeJumpType(LinkRecord& record, const uint8_t* from, const uint8_t* to) { return ARM64Assembler::computeJumpType(record, from, to); } - static int jumpSizeDelta(JumpType jumpType, JumpLinkType jumpLinkType) { return ARM64Assembler::jumpSizeDelta(jumpType, jumpLinkType); } - static void link(LinkRecord& record, uint8_t* from, uint8_t* to) { return ARM64Assembler::link(record, from, to); } + bool canCompact(JumpType jumpType) { return m_assembler.canCompact(jumpType); } + JumpLinkType computeJumpType(JumpType jumpType, const uint8_t* from, const uint8_t* to) { return m_assembler.computeJumpType(jumpType, from, to); } + JumpLinkType computeJumpType(LinkRecord& record, const uint8_t* from, const uint8_t* to) { return m_assembler.computeJumpType(record, from, to); } + void recordLinkOffsets(int32_t regionStart, int32_t regionEnd, int32_t offset) {return m_assembler.recordLinkOffsets(regionStart, regionEnd, offset); } + int jumpSizeDelta(JumpType jumpType, JumpLinkType jumpLinkType) { return m_assembler.jumpSizeDelta(jumpType, jumpLinkType); } + void link(LinkRecord& record, uint8_t* from, uint8_t* to) { return m_assembler.link(record, from, to); } + int executableOffsetFor(int location) { return m_assembler.executableOffsetFor(location); } static const Scale ScalePtr = TimesEight; @@ -128,6 +130,7 @@ public: // FIXME: Get reasonable implementations for these static bool shouldBlindForSpecificArch(uint32_t value) { return value >= 0x00ffffff; } static bool shouldBlindForSpecificArch(uint64_t value) { return value >= 0x00ffffff; } + static bool shouldBlindForSpecificArch(uintptr_t value) { return value >= 0x00ffffff; } // Integer operations: @@ -198,10 +201,7 @@ public: void add64(RegisterID src, RegisterID dest) { - if (src == ARM64Registers::sp) - m_assembler.add<64>(dest, src, dest); - else - m_assembler.add<64>(dest, dest, src); + m_assembler.add<64>(dest, dest, src); } void add64(TrustedImm32 imm, RegisterID dest) @@ -288,11 +288,6 @@ public: store64(dataTempRegister, address.m_ptr); } - void addPtrNoFlags(TrustedImm32 imm, RegisterID srcDest) - { - add64(imm, srcDest); - } - void add64(Address src, RegisterID dest) { load64(src, getCachedDataTempRegisterIDAndInvalidate()); @@ -476,13 +471,6 @@ public: store32(dataTempRegister, address.m_ptr); } - void or32(TrustedImm32 imm, Address address) - { - load32(address, getCachedDataTempRegisterIDAndInvalidate()); - or32(imm, dataTempRegister, dataTempRegister); - store32(dataTempRegister, address); - } - void or64(RegisterID src, RegisterID dest) { or64(dest, src, dest); @@ -503,7 +491,7 @@ public: LogicalImmediate logicalImm = LogicalImmediate::create64(static_cast<intptr_t>(static_cast<int64_t>(imm.m_value))); if (logicalImm.isValid()) { - m_assembler.orr<64>(dest, src, logicalImm); + m_assembler.orr<64>(dest, dest, logicalImm); return; } @@ -551,12 +539,12 @@ public: void rshift64(RegisterID src, RegisterID shiftAmount, RegisterID dest) { - m_assembler.asr<64>(dest, src, shiftAmount); + m_assembler.lsr<64>(dest, src, shiftAmount); } void rshift64(RegisterID src, TrustedImm32 imm, RegisterID dest) { - m_assembler.asr<64>(dest, src, imm.m_value & 0x3f); + m_assembler.lsr<64>(dest, src, imm.m_value & 0x3f); } void rshift64(RegisterID shiftAmount, RegisterID dest) @@ -689,26 +677,6 @@ public: urshift32(dest, imm, dest); } - void urshift64(RegisterID src, RegisterID shiftAmount, RegisterID dest) - { - m_assembler.lsr<64>(dest, src, shiftAmount); - } - - void urshift64(RegisterID src, TrustedImm32 imm, RegisterID dest) - { - m_assembler.lsr<64>(dest, src, imm.m_value & 0x1f); - } - - void urshift64(RegisterID shiftAmount, RegisterID dest) - { - urshift64(dest, shiftAmount, dest); - } - - void urshift64(TrustedImm32 imm, RegisterID dest) - { - urshift64(dest, imm, dest); - } - void xor32(RegisterID src, RegisterID dest) { xor32(dest, src, dest); @@ -732,7 +700,7 @@ public: LogicalImmediate logicalImm = LogicalImmediate::create32(imm.m_value); if (logicalImm.isValid()) { - m_assembler.eor<32>(dest, src, logicalImm); + m_assembler.eor<32>(dest, dest, logicalImm); return; } @@ -771,7 +739,7 @@ public: LogicalImmediate logicalImm = LogicalImmediate::create64(static_cast<intptr_t>(static_cast<int64_t>(imm.m_value))); if (logicalImm.isValid()) { - m_assembler.eor<64>(dest, src, logicalImm); + m_assembler.eor<64>(dest, dest, logicalImm); return; } @@ -825,18 +793,6 @@ public: return label; } - void abortWithReason(AbortReason reason) - { - move(TrustedImm32(reason), dataTempRegister); - breakpoint(); - } - - void abortWithReason(AbortReason reason, intptr_t misc) - { - move(TrustedImm64(misc), memoryTempRegister); - abortWithReason(reason); - } - ConvertibleLoadLabel convertibleLoadPtr(Address address, RegisterID dest) { ConvertibleLoadLabel result(this); @@ -918,16 +874,16 @@ public: load16(address, dest); } - void load16SignedExtendTo32(BaseIndex address, RegisterID dest) + void load16Signed(BaseIndex address, RegisterID dest) { if (!address.offset && (!address.scale || address.scale == 1)) { - m_assembler.ldrsh<32>(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale); + m_assembler.ldrsh<64>(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale); return; } signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate()); m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale); - m_assembler.ldrsh<32>(dest, address.base, memoryTempRegister); + m_assembler.ldrsh<64>(dest, address.base, memoryTempRegister); } void load8(ImplicitAddress address, RegisterID dest) @@ -959,16 +915,16 @@ public: m_cachedMemoryTempRegister.invalidate(); } - void load8SignedExtendTo32(BaseIndex address, RegisterID dest) + void load8Signed(BaseIndex address, RegisterID dest) { if (!address.offset && !address.scale) { - m_assembler.ldrsb<32>(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale); + m_assembler.ldrsb<64>(dest, address.base, address.index, ARM64Assembler::UXTX, address.scale); return; } signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate()); m_assembler.add<64>(memoryTempRegister, memoryTempRegister, address.index, ARM64Assembler::UXTX, address.scale); - m_assembler.ldrsb<32>(dest, address.base, memoryTempRegister); + m_assembler.ldrsb<64>(dest, address.base, memoryTempRegister); } void store64(RegisterID src, ImplicitAddress address) @@ -1124,15 +1080,6 @@ public: m_assembler.strb(src, memoryTempRegister, 0); } - void store8(RegisterID src, ImplicitAddress address) - { - if (tryStoreWithOffset<8>(src, address.base, address.offset)) - return; - - signExtend32ToPtr(TrustedImm32(address.offset), getCachedMemoryTempRegisterIDAndInvalidate()); - m_assembler.str<8>(src, address.base, memoryTempRegister); - } - void store8(TrustedImm32 imm, void* address) { if (!imm.m_value) { @@ -1144,16 +1091,6 @@ public: store8(dataTempRegister, address); } - void store8(TrustedImm32 imm, ImplicitAddress address) - { - if (!imm.m_value) { - store8(ARM64Registers::zr, address); - return; - } - - move(imm, getCachedDataTempRegisterIDAndInvalidate()); - store8(dataTempRegister, address); - } // Floating-point operations: @@ -1187,7 +1124,7 @@ public: void addDouble(AbsoluteAddress address, FPRegisterID dest) { - loadDouble(TrustedImmPtr(address.m_ptr), fpTempRegister); + loadDouble(address.m_ptr, fpTempRegister); addDouble(fpTempRegister, dest); } @@ -1213,14 +1150,9 @@ public: m_assembler.scvtf<64, 32>(fpTempRegister, dest); failureCases.append(branchDouble(DoubleNotEqualOrUnordered, src, fpTempRegister)); - // Test for negative zero. - if (negZeroCheck) { - Jump valueIsNonZero = branchTest32(NonZero, dest); - RegisterID scratch = getCachedMemoryTempRegisterIDAndInvalidate(); - m_assembler.fmov<64>(scratch, src); - failureCases.append(makeTestBitAndBranch(scratch, 63, IsNonZero)); - valueIsNonZero.link(this); - } + // If the result is zero, it might have been -0.0, and the double comparison won't catch this! + if (negZeroCheck) + failureCases.append(branchTest32(Zero, dest)); } Jump branchDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right) @@ -1346,9 +1278,9 @@ public: m_assembler.ldr<64>(dest, address.base, memoryTempRegister); } - void loadDouble(TrustedImmPtr address, FPRegisterID dest) + void loadDouble(const void* address, FPRegisterID dest) { - moveToCachedReg(address, m_cachedMemoryTempRegister); + moveToCachedReg(TrustedImmPtr(address), m_cachedMemoryTempRegister); m_assembler.ldr<64>(dest, memoryTempRegister, ARM64Registers::zr); } @@ -1414,9 +1346,9 @@ public: m_assembler.str<64>(src, address.base, memoryTempRegister); } - void storeDouble(FPRegisterID src, TrustedImmPtr address) + void storeDouble(FPRegisterID src, const void* address) { - moveToCachedReg(address, m_cachedMemoryTempRegister); + moveToCachedReg(TrustedImmPtr(address), m_cachedMemoryTempRegister); m_assembler.str<64>(src, memoryTempRegister, ARM64Registers::zr); } @@ -1505,16 +1437,6 @@ public: CRASH(); } - void popPair(RegisterID dest1, RegisterID dest2) - { - m_assembler.ldp<64>(dest1, dest2, ARM64Registers::sp, PairPostIndex(16)); - } - - void pushPair(RegisterID src1, RegisterID src2) - { - m_assembler.stp<64>(src1, src2, ARM64Registers::sp, PairPreIndex(-16)); - } - void popToRestore(RegisterID dest) { m_assembler.ldr<64>(dest, ARM64Registers::sp, PostIndex(16)); @@ -1524,15 +1446,6 @@ public: { m_assembler.str<64>(src, ARM64Registers::sp, PreIndex(-16)); } - - void pushToSaveImmediateWithoutTouchingRegisters(TrustedImm32 imm) - { - RegisterID reg = dataTempRegister; - pushPair(reg, reg); - move(imm, reg); - store64(reg, stackPointerRegister); - load64(Address(stackPointerRegister, 8), reg); - } void pushToSave(Address address) { @@ -1558,7 +1471,6 @@ public: storeDouble(src, stackPointerRegister); } - static ptrdiff_t pushToSaveByteOffset() { return 16; } // Register move operations: @@ -1676,16 +1588,6 @@ public: Jump branch64(RelationalCondition cond, RegisterID left, RegisterID right) { - if (right == ARM64Registers::sp) { - if (cond == Equal && left != ARM64Registers::sp) { - // CMP can only use SP for the left argument, since we are testing for equality, the order - // does not matter here. - std::swap(left, right); - } else { - move(right, getCachedDataTempRegisterIDAndInvalidate()); - right = dataTempRegister; - } - } m_assembler.cmp<64>(left, right); return Jump(makeBranch(cond)); } @@ -1728,12 +1630,6 @@ public: return branch64(cond, memoryTempRegister, right); } - Jump branchPtr(RelationalCondition cond, BaseIndex left, RegisterID right) - { - load64(left, getCachedMemoryTempRegisterIDAndInvalidate()); - return branch64(cond, memoryTempRegister, right); - } - Jump branch8(RelationalCondition cond, Address left, TrustedImm32 right) { ASSERT(!(0xffffff00 & right.m_value)); @@ -1761,32 +1657,6 @@ public: return Jump(makeBranch(cond)); } - void test32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) - { - if (mask.m_value == -1) - m_assembler.tst<32>(reg, reg); - else { - bool testedWithImmediate = false; - if ((cond == Zero) || (cond == NonZero)) { - LogicalImmediate logicalImm = LogicalImmediate::create32(mask.m_value); - - if (logicalImm.isValid()) { - m_assembler.tst<32>(reg, logicalImm); - testedWithImmediate = true; - } - } - if (!testedWithImmediate) { - move(mask, getCachedDataTempRegisterIDAndInvalidate()); - m_assembler.tst<32>(reg, dataTempRegister); - } - } - } - - Jump branch(ResultCondition cond) - { - return Jump(makeBranch(cond)); - } - Jump branchTest32(ResultCondition cond, RegisterID reg, TrustedImm32 mask = TrustedImm32(-1)) { if (mask.m_value == -1) { @@ -2334,17 +2204,10 @@ public: return branch64(cond, left, dataTempRegister); } - ALWAYS_INLINE Jump branch32WithPatch(RelationalCondition cond, Address left, DataLabel32& dataLabel, TrustedImm32 initialRightValue = TrustedImm32(0)) - { - dataLabel = DataLabel32(this); - moveWithPatch(initialRightValue, getCachedDataTempRegisterIDAndInvalidate()); - return branch32(cond, left, dataTempRegister); - } - - PatchableJump patchableBranchPtr(RelationalCondition cond, Address left, TrustedImmPtr right) + PatchableJump patchableBranchPtr(RelationalCondition cond, Address left, TrustedImmPtr right = TrustedImmPtr(0)) { m_makeJumpPatchable = true; - Jump result = branch64(cond, left, TrustedImm64(right)); + Jump result = branch32(cond, left, TrustedImm32(right)); m_makeJumpPatchable = false; return PatchableJump(result); } @@ -2365,22 +2228,6 @@ public: return PatchableJump(result); } - PatchableJump patchableBranch64(RelationalCondition cond, RegisterID reg, TrustedImm64 imm) - { - m_makeJumpPatchable = true; - Jump result = branch64(cond, reg, imm); - m_makeJumpPatchable = false; - return PatchableJump(result); - } - - PatchableJump patchableBranch64(RelationalCondition cond, RegisterID left, RegisterID right) - { - m_makeJumpPatchable = true; - Jump result = branch64(cond, left, right); - m_makeJumpPatchable = false; - return PatchableJump(result); - } - PatchableJump patchableBranchPtrWithPatch(RelationalCondition cond, Address left, DataLabelPtr& dataLabel, TrustedImmPtr initialRightValue = TrustedImmPtr(0)) { m_makeJumpPatchable = true; @@ -2389,14 +2236,6 @@ public: return PatchableJump(result); } - PatchableJump patchableBranch32WithPatch(RelationalCondition cond, Address left, DataLabel32& dataLabel, TrustedImm32 initialRightValue = TrustedImm32(0)) - { - m_makeJumpPatchable = true; - Jump result = branch32WithPatch(cond, left, dataLabel, initialRightValue); - m_makeJumpPatchable = false; - return PatchableJump(result); - } - PatchableJump patchableJump() { m_makeJumpPatchable = true; @@ -2464,15 +2303,9 @@ public: return ARM64Assembler::maxJumpReplacementSize(); } - RegisterID scratchRegisterForBlinding() - { - // We *do not* have a scratch register for blinding. - RELEASE_ASSERT_NOT_REACHED(); - return getCachedDataTempRegisterIDAndInvalidate(); - } + RegisterID scratchRegisterForBlinding() { return getCachedDataTempRegisterIDAndInvalidate(); } static bool canJumpReplacePatchableBranchPtrWithPatch() { return false; } - static bool canJumpReplacePatchableBranch32WithPatch() { return false; } static CodeLocationLabel startOfBranchPtrWithPatchOnRegister(CodeLocationDataLabelPtr label) { @@ -2485,12 +2318,6 @@ public: return CodeLocationLabel(); } - static CodeLocationLabel startOfPatchableBranch32WithPatchOnAddress(CodeLocationDataLabel32) - { - UNREACHABLE_FOR_PLATFORM(); - return CodeLocationLabel(); - } - static void revertJumpReplacementToBranchPtrWithPatch(CodeLocationLabel instructionStart, RegisterID, void* initialValue) { reemitInitialMoveWithPatch(instructionStart.dataLocation(), initialValue); @@ -2501,11 +2328,6 @@ public: UNREACHABLE_FOR_PLATFORM(); } - static void revertJumpReplacementToPatchableBranch32WithPatch(CodeLocationLabel, Address, int32_t) - { - UNREACHABLE_FOR_PLATFORM(); - } - protected: ALWAYS_INLINE Jump makeBranch(ARM64Assembler::Condition cond) { |