diff options
author | Lorry Tar Creator <lorry-tar-importer@lorry> | 2016-04-10 09:28:39 +0000 |
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committer | Lorry Tar Creator <lorry-tar-importer@lorry> | 2016-04-10 09:28:39 +0000 |
commit | 32761a6cee1d0dee366b885b7b9c777e67885688 (patch) | |
tree | d6bec92bebfb216f4126356e55518842c2f476a1 /Source/JavaScriptCore/jit/FPRInfo.h | |
parent | a4e969f4965059196ca948db781e52f7cfebf19e (diff) | |
download | WebKitGtk-tarball-32761a6cee1d0dee366b885b7b9c777e67885688.tar.gz |
webkitgtk-2.4.11webkitgtk-2.4.11
Diffstat (limited to 'Source/JavaScriptCore/jit/FPRInfo.h')
-rw-r--r-- | Source/JavaScriptCore/jit/FPRInfo.h | 46 |
1 files changed, 14 insertions, 32 deletions
diff --git a/Source/JavaScriptCore/jit/FPRInfo.h b/Source/JavaScriptCore/jit/FPRInfo.h index a19a1ac38..5bb0e16cc 100644 --- a/Source/JavaScriptCore/jit/FPRInfo.h +++ b/Source/JavaScriptCore/jit/FPRInfo.h @@ -42,7 +42,6 @@ class FPRInfo { public: typedef FPRReg RegisterType; static const unsigned numberOfRegisters = 6; - static const unsigned numberOfArgumentRegisters = 8; // Temporary registers. static const FPRReg fpRegT0 = X86Registers::xmm0; @@ -57,10 +56,6 @@ public: static const FPRReg argumentFPR1 = X86Registers::xmm1; // fpRegT1 static const FPRReg argumentFPR2 = X86Registers::xmm2; // fpRegT2 static const FPRReg argumentFPR3 = X86Registers::xmm3; // fpRegT3 - static const FPRReg argumentFPR4 = X86Registers::xmm4; // fpRegT4 - static const FPRReg argumentFPR5 = X86Registers::xmm5; // fpRegT5 - static const FPRReg argumentFPR6 = X86Registers::xmm6; - static const FPRReg argumentFPR7 = X86Registers::xmm7; #endif // On X86 the return will actually be on the x87 stack, // so we'll copy to xmm0 for sanity! @@ -187,7 +182,6 @@ class FPRInfo { public: typedef FPRReg RegisterType; static const unsigned numberOfRegisters = 23; - static const unsigned numberOfArgumentRegisters = 8; // Temporary registers. // q8-q15 are callee saved, q31 is use by the MacroAssembler as fpTempRegister. @@ -214,14 +208,6 @@ public: static const FPRReg fpRegT20 = ARM64Registers::q28; static const FPRReg fpRegT21 = ARM64Registers::q29; static const FPRReg fpRegT22 = ARM64Registers::q30; - static const FPRReg fpRegCS0 = ARM64Registers::q8; - static const FPRReg fpRegCS1 = ARM64Registers::q9; - static const FPRReg fpRegCS2 = ARM64Registers::q10; - static const FPRReg fpRegCS3 = ARM64Registers::q11; - static const FPRReg fpRegCS4 = ARM64Registers::q12; - static const FPRReg fpRegCS5 = ARM64Registers::q13; - static const FPRReg fpRegCS6 = ARM64Registers::q14; - static const FPRReg fpRegCS7 = ARM64Registers::q15; static const FPRReg argumentFPR0 = ARM64Registers::q0; // fpRegT0 static const FPRReg argumentFPR1 = ARM64Registers::q1; // fpRegT1 @@ -256,15 +242,10 @@ public: 16, 17, 18, 19, 20, 21, 22, InvalidIndex }; unsigned result = indexForRegister[reg]; + ASSERT(result != InvalidIndex); return result; } - static FPRReg toArgumentRegister(unsigned index) - { - ASSERT(index < 8); - return static_cast<FPRReg>(index); - } - static const char* debugName(FPRReg reg) { ASSERT(reg != InvalidFPRReg); @@ -288,16 +269,15 @@ public: class FPRInfo { public: typedef FPRReg RegisterType; - static const unsigned numberOfRegisters = 7; + static const unsigned numberOfRegisters = 6; // Temporary registers. static const FPRReg fpRegT0 = MIPSRegisters::f0; - static const FPRReg fpRegT1 = MIPSRegisters::f2; - static const FPRReg fpRegT2 = MIPSRegisters::f4; - static const FPRReg fpRegT3 = MIPSRegisters::f6; - static const FPRReg fpRegT4 = MIPSRegisters::f8; - static const FPRReg fpRegT5 = MIPSRegisters::f10; - static const FPRReg fpRegT6 = MIPSRegisters::f18; + static const FPRReg fpRegT1 = MIPSRegisters::f4; + static const FPRReg fpRegT2 = MIPSRegisters::f6; + static const FPRReg fpRegT3 = MIPSRegisters::f8; + static const FPRReg fpRegT4 = MIPSRegisters::f10; + static const FPRReg fpRegT5 = MIPSRegisters::f18; static const FPRReg returnValueFPR = MIPSRegisters::f0; @@ -307,7 +287,7 @@ public: static FPRReg toRegister(unsigned index) { static const FPRReg registerForIndex[numberOfRegisters] = { - fpRegT0, fpRegT1, fpRegT2, fpRegT3, fpRegT4, fpRegT5, fpRegT6 }; + fpRegT0, fpRegT1, fpRegT2, fpRegT3, fpRegT4, fpRegT5 }; ASSERT(index < numberOfRegisters); return registerForIndex[index]; @@ -318,13 +298,14 @@ public: ASSERT(reg != InvalidFPRReg); ASSERT(reg < 20); static const unsigned indexForRegister[20] = { - 0, InvalidIndex, 1, InvalidIndex, - 2, InvalidIndex, 3, InvalidIndex, - 4, InvalidIndex, 5, InvalidIndex, + 0, InvalidIndex, InvalidIndex, InvalidIndex, + 1, InvalidIndex, 2, InvalidIndex, + 3, InvalidIndex, 4, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, - InvalidIndex, InvalidIndex, 6, InvalidIndex, + InvalidIndex, InvalidIndex, 5, InvalidIndex, }; unsigned result = indexForRegister[reg]; + ASSERT(result != InvalidIndex); return result; } @@ -390,6 +371,7 @@ public: InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex }; unsigned result = indexForRegister[reg]; + ASSERT(result != InvalidIndex); return result; } |