diff options
Diffstat (limited to 'Source/JavaScriptCore/assembler/MacroAssembler.h')
| -rw-r--r-- | Source/JavaScriptCore/assembler/MacroAssembler.h | 321 |
1 files changed, 276 insertions, 45 deletions
diff --git a/Source/JavaScriptCore/assembler/MacroAssembler.h b/Source/JavaScriptCore/assembler/MacroAssembler.h index 4a43eb625..35a3647dc 100644 --- a/Source/JavaScriptCore/assembler/MacroAssembler.h +++ b/Source/JavaScriptCore/assembler/MacroAssembler.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2008, 2012, 2013 Apple Inc. All rights reserved. + * Copyright (C) 2008, 2012-2015 Apple Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -26,8 +26,6 @@ #ifndef MacroAssembler_h #define MacroAssembler_h -#include <wtf/Platform.h> - #if ENABLE(ASSEMBLER) #if CPU(ARM_THUMB2) @@ -71,63 +69,42 @@ namespace JSC { class MacroAssembler : public MacroAssemblerBase { public: - static bool isStackRelated(RegisterID reg) - { - return reg == stackPointerRegister || reg == framePointerRegister; - } - - static RegisterID firstRealRegister() - { - RegisterID firstRegister = MacroAssembler::firstRegister(); - while (MacroAssembler::isStackRelated(firstRegister)) - firstRegister = static_cast<RegisterID>(firstRegister + 1); - return firstRegister; - } - - static RegisterID nextRegister(RegisterID reg) - { - RegisterID result = static_cast<RegisterID>(reg + 1); - while (MacroAssembler::isStackRelated(result)) - result = static_cast<RegisterID>(result + 1); - return result; - } - - static RegisterID secondRealRegister() + static constexpr RegisterID nextRegister(RegisterID reg) { - return nextRegister(firstRealRegister()); + return static_cast<RegisterID>(reg + 1); } - static FPRegisterID nextFPRegister(FPRegisterID reg) + static constexpr FPRegisterID nextFPRegister(FPRegisterID reg) { return static_cast<FPRegisterID>(reg + 1); } - static unsigned numberOfRegisters() + static constexpr unsigned numberOfRegisters() { return lastRegister() - firstRegister() + 1; } - static unsigned registerIndex(RegisterID reg) + static constexpr unsigned registerIndex(RegisterID reg) { return reg - firstRegister(); } - static unsigned numberOfFPRegisters() + static constexpr unsigned numberOfFPRegisters() { return lastFPRegister() - firstFPRegister() + 1; } - static unsigned fpRegisterIndex(FPRegisterID reg) + static constexpr unsigned fpRegisterIndex(FPRegisterID reg) { return reg - firstFPRegister(); } - static unsigned registerIndex(FPRegisterID reg) + static constexpr unsigned registerIndex(FPRegisterID reg) { return fpRegisterIndex(reg) + numberOfRegisters(); } - static unsigned totalNumberOfRegisters() + static constexpr unsigned totalNumberOfRegisters() { return numberOfRegisters() + numberOfFPRegisters(); } @@ -135,14 +112,16 @@ public: using MacroAssemblerBase::pop; using MacroAssemblerBase::jump; using MacroAssemblerBase::branch32; + using MacroAssemblerBase::compare32; using MacroAssemblerBase::move; using MacroAssemblerBase::add32; + using MacroAssemblerBase::mul32; using MacroAssemblerBase::and32; using MacroAssemblerBase::branchAdd32; using MacroAssemblerBase::branchMul32; -#if CPU(X86_64) +#if CPU(ARM64) || CPU(ARM_THUMB2) || CPU(X86_64) using MacroAssemblerBase::branchPtr; -#endif // CPU(X86_64) +#endif using MacroAssemblerBase::branchSub32; using MacroAssemblerBase::lshift32; using MacroAssemblerBase::or32; @@ -190,10 +169,9 @@ public: return DoubleGreaterThanOrEqual; case DoubleLessThanOrEqualOrUnordered: return DoubleGreaterThan; - default: - RELEASE_ASSERT_NOT_REACHED(); - return DoubleEqual; // make compiler happy } + RELEASE_ASSERT_NOT_REACHED(); + return DoubleEqual; // make compiler happy } static bool isInvertible(ResultCondition cond) @@ -201,6 +179,8 @@ public: switch (cond) { case Zero: case NonZero: + case Signed: + case PositiveOrZero: return true; default: return false; @@ -214,11 +194,81 @@ public: return NonZero; case NonZero: return Zero; + case Signed: + return PositiveOrZero; + case PositiveOrZero: + return Signed; default: RELEASE_ASSERT_NOT_REACHED(); return Zero; // Make compiler happy for release builds. } } + + static RelationalCondition flip(RelationalCondition cond) + { + switch (cond) { + case Equal: + case NotEqual: + return cond; + case Above: + return Below; + case AboveOrEqual: + return BelowOrEqual; + case Below: + return Above; + case BelowOrEqual: + return AboveOrEqual; + case GreaterThan: + return LessThan; + case GreaterThanOrEqual: + return LessThanOrEqual; + case LessThan: + return GreaterThan; + case LessThanOrEqual: + return GreaterThanOrEqual; + } + + RELEASE_ASSERT_NOT_REACHED(); + return Equal; + } + + // True if this: + // branch8(cond, value, value) + // Is the same as this: + // branch32(cond, signExt8(value), signExt8(value)) + static bool isSigned(RelationalCondition cond) + { + switch (cond) { + case Equal: + case NotEqual: + case GreaterThan: + case GreaterThanOrEqual: + case LessThan: + case LessThanOrEqual: + return true; + default: + return false; + } + } + + // True if this: + // branch8(cond, value, value) + // Is the same as this: + // branch32(cond, zeroExt8(value), zeroExt8(value)) + static bool isUnsigned(RelationalCondition cond) + { + switch (cond) { + case Equal: + case NotEqual: + case Above: + case AboveOrEqual: + case Below: + case BelowOrEqual: + return true; + default: + return false; + } + } #endif // Platform agnostic onvenience functions, @@ -258,6 +308,10 @@ public: { push(src); } + void pushToSaveImmediateWithoutTouchingRegisters(TrustedImm32 imm) + { + push(imm); + } void popToRestore(RegisterID dest) { pop(dest); @@ -272,6 +326,8 @@ public: loadDouble(stackPointerRegister, dest); addPtr(TrustedImm32(sizeof(double)), stackPointerRegister); } + + static ptrdiff_t pushToSaveByteOffset() { return sizeof(void*); } #endif // !CPU(ARM64) #if CPU(X86_64) || CPU(ARM64) @@ -346,6 +402,11 @@ public: return branch32(commute(cond), right, left); } + void compare32(RelationalCondition cond, Imm32 left, RegisterID right, RegisterID dest) + { + compare32(commute(cond), right, left, dest); + } + void branchTestPtr(ResultCondition cond, RegisterID reg, Label target) { branchTestPtr(cond, reg).linkTo(target, this); @@ -362,6 +423,11 @@ public: return PatchableJump(branchPtrWithPatch(cond, left, dataLabel, initialRightValue)); } + PatchableJump patchableBranch32WithPatch(RelationalCondition cond, Address left, DataLabel32& dataLabel, TrustedImm32 initialRightValue = TrustedImm32(0)) + { + return PatchableJump(branch32WithPatch(cond, left, dataLabel, initialRightValue)); + } + #if !CPU(ARM_TRADITIONAL) PatchableJump patchableJump() { @@ -377,6 +443,11 @@ public: { return PatchableJump(branch32(cond, reg, imm)); } + + PatchableJump patchableBranch32(RelationalCondition cond, Address address, TrustedImm32 imm) + { + return PatchableJump(branch32(cond, address, imm)); + } #endif #endif @@ -414,6 +485,18 @@ public: return condition; } + void oops() + { + abortWithReason(B3Oops); + } + + // B3 has additional pseudo-opcodes for returning, when it wants to signal that the return + // consumes some register in some way. + void ret32(RegisterID) { ret(); } + void ret64(RegisterID) { ret(); } + void retFloat(FPRegisterID) { ret(); } + void retDouble(FPRegisterID) { ret(); } + static const unsigned BlindingModulus = 64; bool shouldConsiderBlinding() { @@ -439,6 +522,11 @@ public: add32(src, dest); } + void addPtr(RegisterID left, RegisterID right, RegisterID dest) + { + add32(left, right, dest); + } + void addPtr(TrustedImm32 imm, RegisterID srcDest) { add32(imm, srcDest); @@ -474,6 +562,21 @@ public: and32(TrustedImm32(imm), srcDest); } + void lshiftPtr(Imm32 imm, RegisterID srcDest) + { + lshift32(trustedImm32ForShift(imm), srcDest); + } + + void rshiftPtr(Imm32 imm, RegisterID srcDest) + { + rshift32(trustedImm32ForShift(imm), srcDest); + } + + void urshiftPtr(Imm32 imm, RegisterID srcDest) + { + urshift32(trustedImm32ForShift(imm), srcDest); + } + void negPtr(RegisterID dest) { neg32(dest); @@ -595,6 +698,11 @@ public: store32(TrustedImm32(imm), address); } + void storePtr(TrustedImm32 imm, ImplicitAddress address) + { + store32(imm, address); + } + void storePtr(TrustedImmPtr imm, BaseIndex address) { store32(TrustedImm32(imm), address); @@ -691,6 +799,11 @@ public: { add64(src, dest); } + + void addPtr(RegisterID left, RegisterID right, RegisterID dest) + { + add64(left, right, dest); + } void addPtr(Address src, RegisterID dest) { @@ -747,6 +860,16 @@ public: lshift64(trustedImm32ForShift(imm), srcDest); } + void rshiftPtr(Imm32 imm, RegisterID srcDest) + { + rshift64(trustedImm32ForShift(imm), srcDest); + } + + void urshiftPtr(Imm32 imm, RegisterID srcDest) + { + urshift64(trustedImm32ForShift(imm), srcDest); + } + void negPtr(RegisterID dest) { neg64(dest); @@ -857,6 +980,11 @@ public: store64(TrustedImm64(imm), address); } + void storePtr(TrustedImm32 imm, ImplicitAddress address) + { + store64(imm, address); + } + void storePtr(TrustedImmPtr imm, BaseIndex address) { store64(TrustedImm64(imm), address); @@ -986,7 +1114,7 @@ public: if (bitwise_cast<uint64_t>(value * 1.0) != bitwise_cast<uint64_t>(value)) return shouldConsiderBlinding(); - value = abs(value); + value = fabs(value); // Only allow a limited set of fractional components double scaledValue = value * 8; if (scaledValue / 8 != value) @@ -1137,7 +1265,7 @@ public: void convertInt32ToDouble(Imm32 imm, FPRegisterID dest) { - if (shouldBlind(imm)) { + if (shouldBlind(imm) && haveScratchRegisterForBlinding()) { RegisterID scratchRegister = scratchRegisterForBlinding(); loadXorBlindedConstant(xorBlindConstant(imm), scratchRegister); convertInt32ToDouble(scratchRegister, dest); @@ -1173,7 +1301,7 @@ public: Jump branchPtr(RelationalCondition cond, RegisterID left, ImmPtr right) { - if (shouldBlind(right)) { + if (shouldBlind(right) && haveScratchRegisterForBlinding()) { RegisterID scratchRegister = scratchRegisterForBlinding(); loadRotationBlindedConstant(rotationBlindConstant(right), scratchRegister); return branchPtr(cond, left, scratchRegister); @@ -1183,7 +1311,7 @@ public: void storePtr(ImmPtr imm, Address dest) { - if (shouldBlind(imm)) { + if (shouldBlind(imm) && haveScratchRegisterForBlinding()) { RegisterID scratchRegister = scratchRegisterForBlinding(); loadRotationBlindedConstant(rotationBlindConstant(imm), scratchRegister); storePtr(scratchRegister, dest); @@ -1193,7 +1321,7 @@ public: void store64(Imm64 imm, Address dest) { - if (shouldBlind(imm)) { + if (shouldBlind(imm) && haveScratchRegisterForBlinding()) { RegisterID scratchRegister = scratchRegisterForBlinding(); loadRotationBlindedConstant(rotationBlindConstant(imm), scratchRegister); store64(scratchRegister, dest); @@ -1203,6 +1331,30 @@ public: #endif // !CPU(X86_64) +#if ENABLE(B3_JIT) + // We should implement this the right way eventually, but for now, it's fine because it arises so + // infrequently. + void compareDouble(DoubleCondition cond, FPRegisterID left, FPRegisterID right, RegisterID dest) + { + move(TrustedImm32(0), dest); + Jump falseCase = branchDouble(invert(cond), left, right); + move(TrustedImm32(1), dest); + falseCase.link(this); + } + void compareFloat(DoubleCondition cond, FPRegisterID left, FPRegisterID right, RegisterID dest) + { + move(TrustedImm32(0), dest); + Jump falseCase = branchFloat(invert(cond), left, right); + move(TrustedImm32(1), dest); + falseCase.link(this); + } +#endif + + void lea(Address address, RegisterID dest) + { + addPtr(TrustedImm32(address.offset), address.base, dest); + } + bool shouldBlind(Imm32 imm) { #if ENABLE(FORCED_JIT_BLINDING) @@ -1316,6 +1468,16 @@ public: } else add32(imm.asTrustedImm32(), dest); } + + void add32(Imm32 imm, RegisterID src, RegisterID dest) + { + if (shouldBlind(imm)) { + BlindedImm32 key = additionBlindedConstant(imm); + add32(key.value1, src, dest); + add32(key.value2, dest); + } else + add32(imm.asTrustedImm32(), src, dest); + } void addPtr(Imm32 imm, RegisterID dest) { @@ -1327,6 +1489,27 @@ public: addPtr(imm.asTrustedImm32(), dest); } + void mul32(Imm32 imm, RegisterID src, RegisterID dest) + { + if (shouldBlind(imm)) { + if (src != dest || haveScratchRegisterForBlinding()) { + if (src == dest) { + move(src, scratchRegisterForBlinding()); + src = scratchRegisterForBlinding(); + } + loadXorBlindedConstant(xorBlindConstant(imm), dest); + mul32(src, dest); + return; + } + // If we don't have a scratch register available for use, we'll just + // place a random number of nops. + uint32_t nopCount = random() & 3; + while (nopCount--) + nop(); + } + mul32(imm.asTrustedImm32(), src, dest); + } + void and32(Imm32 imm, RegisterID dest) { if (shouldBlind(imm)) { @@ -1486,6 +1669,29 @@ public: return branch32(cond, left, right.asTrustedImm32()); } + void compare32(RelationalCondition cond, RegisterID left, Imm32 right, RegisterID dest) + { + if (shouldBlind(right)) { + if (left != dest || haveScratchRegisterForBlinding()) { + RegisterID blindedConstantReg = dest; + if (left == dest) + blindedConstantReg = scratchRegisterForBlinding(); + loadXorBlindedConstant(xorBlindConstant(right), blindedConstantReg); + compare32(cond, left, blindedConstantReg, dest); + return; + } + // If we don't have a scratch register available for use, we'll just + // place a random number of nops. + uint32_t nopCount = random() & 3; + while (nopCount--) + nop(); + compare32(cond, left, right.asTrustedImm32(), dest); + return; + } + + compare32(cond, left, right.asTrustedImm32(), dest); + } + Jump branchAdd32(ResultCondition cond, RegisterID src, Imm32 imm, RegisterID dest) { if (src == dest) @@ -1502,7 +1708,7 @@ public: return branchAdd32(cond, src, imm.asTrustedImm32(), dest); } - Jump branchMul32(ResultCondition cond, Imm32 imm, RegisterID src, RegisterID dest) + Jump branchMul32(ResultCondition cond, RegisterID src, Imm32 imm, RegisterID dest) { if (src == dest) ASSERT(haveScratchRegisterForBlinding()); @@ -1515,7 +1721,7 @@ public: loadXorBlindedConstant(xorBlindConstant(imm), dest); return branchMul32(cond, src, dest); } - return branchMul32(cond, imm.asTrustedImm32(), src, dest); + return branchMul32(cond, src, imm.asTrustedImm32(), dest); } // branchSub32 takes a scratch register as 32 bit platforms make use of this, @@ -1560,12 +1766,35 @@ public: { urshift32(src, trustedImm32ForShift(amount), dest); } + +#if ENABLE(MASM_PROBE) + using MacroAssemblerBase::probe; + + // Let's you print from your JIT generated code. + // See comments in MacroAssemblerPrinter.h for examples of how to use this. + template<typename... Arguments> + void print(Arguments... args); + + void probe(std::function<void (ProbeContext*)>); +#endif }; } // namespace JSC +namespace WTF { + +class PrintStream; + +void printInternal(PrintStream&, JSC::MacroAssembler::RelationalCondition); +void printInternal(PrintStream&, JSC::MacroAssembler::ResultCondition); +void printInternal(PrintStream&, JSC::MacroAssembler::DoubleCondition); + +} // namespace WTF + #else // ENABLE(ASSEMBLER) +namespace JSC { + // If there is no assembler for this platform, at least allow code to make references to // some of the things it would otherwise define, albeit without giving that code any way // of doing anything useful. @@ -1579,6 +1808,8 @@ public: enum FPRegisterID { NoFPRegister }; }; +} // namespace JSC + #endif // ENABLE(ASSEMBLER) #endif // MacroAssembler_h |