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authorJeffrey Walton <noloader@gmail.com>2017-09-05 16:28:00 -0400
committerJeffrey Walton <noloader@gmail.com>2017-09-05 16:28:00 -0400
commit37e02f9e0e2ee627f0f95b7bc0a09f4ba1ce562e (patch)
treec8b8cc1e9b0b56998eed479f29aa6f3da33f1755 /config.h
parent23b939c62b7f497d6f99bfe97ad639b35287ac61 (diff)
downloadcryptopp-git-37e02f9e0e2ee627f0f95b7bc0a09f4ba1ce562e.tar.gz
Revert AltiVec and Power8 commits
The strategy of "cleanup under-aligned buffers" is not scaling well. Corner cases are still turing up. The library has some corner-case breaks, like old 32-bit Intels. And it still has not solved the AltiVec and Power8 alignment problems. For now we are backing out the changes and investigating other strategies
Diffstat (limited to 'config.h')
-rw-r--r--config.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/config.h b/config.h
index 752d2b46..2c79923e 100644
--- a/config.h
+++ b/config.h
@@ -585,11 +585,11 @@ NAMESPACE_END
#if (CRYPTOPP_BOOL_PPC32 || CRYPTOPP_BOOL_PPC64)
-#if !defined(CRYPTOPP_ALTIVEC_CRYPTO_AVAILABLE) && !defined(CRYPTOPP_DISABLE_ASM)
+#if !defined(CRYPTOPP_POWER8_CRYPTO_AVAILABLE) && !defined(CRYPTOPP_DISABLE_ASM)
# if defined(__CRYPTO__) || defined(__ALTIVEC__) || defined(__POWER8_VECTOR__)
-# define CRYPTOPP_ALTIVEC_AES_AVAILABLE 1
-# define CRYPTOPP_ALTIVEC_SHA_AVAILABLE 1
-# define CRYPTOPP_ALTIVEC_CRC_AVAILABLE 1
+//# define CRYPTOPP_POWER8_AES_AVAILABLE 1
+//# define CRYPTOPP_POWER8_SHA_AVAILABLE 1
+//# define CRYPTOPP_POWER8_CRC_AVAILABLE 1
# endif
#endif
@@ -598,7 +598,7 @@ NAMESPACE_END
// ***************** Miscellaneous ********************
// Nearly all Intel's and AMD's have SSE. Enable it independent of SSE ASM and intrinscs
-#if (CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64) && !defined(CRYPTOPP_DISABLE_ASM)
+#if (CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_PPC32 || CRYPTOPP_BOOL_PPC64) && !defined(CRYPTOPP_DISABLE_ASM)
#define CRYPTOPP_BOOL_ALIGN16 1
#else
#define CRYPTOPP_BOOL_ALIGN16 0