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* Fix use of <x86intrin.h> for MSVC (GH #1198)Jeffrey Walton2023-04-151-3/+3
| | | | It seems Microsoft now defines GCC defines, like __BMI__
* Fix ppc64le build with ClangJeffrey Walton2020-07-021-6/+6
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* Silence GCC warnings in BLAKE2Jeffrey Walton2020-06-291-0/+5
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* Update commentsJeffrey Walton2020-06-291-9/+9
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* Speedup BLAKE2s message loading on PowerPCJeffrey Walton2020-06-291-1/+2
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* Update commentsJeffrey Walton2020-06-291-1/+1
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* Speedup BLAKE2 message loading on PowerPCJeffrey Walton2020-06-291-12/+32
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* Speedup BLAKE2 message loading on PowerPCJeffrey Walton2020-06-291-14/+62
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* Use little-endian mask during BLAKE2 loadsJeffrey Walton2020-06-281-22/+24
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* Cleanup BLAKE2 POWER8 codeJeffrey Walton2020-06-271-33/+26
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* Avoid BLAKE2b permute and mask on POWER8Jeffrey Walton2020-06-261-41/+20
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* Update commentsJeffrey Walton2020-04-111-1/+1
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* Update file header commentsJeffrey Walton2020-04-111-1/+1
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* Try to replace vec_rl for Clang 3.8Jeffrey Walton2019-10-231-1/+1
| | | | The PowerPC builds are failing at Travis. Travis provides a Power7 machine with Clang 3.8.
* Fix AIX and Linux compiles for PowerPC (PR #902)Jeffrey Walton2019-10-231-2/+3
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* More Clang workarounds on PowerPC (PR #901)Jeffrey Walton2019-10-231-16/+7
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* Fix ARM headers and Android compile (PR #896)Jeffrey Walton2019-10-161-3/+2
| | | | | | | | | | | * Test fix ARM headers This problem has been festering for some time. The header file includes are slightly different than the ISA options. Some platforms need an include, others don't. * Fix cryptest-android.sh and cryptest-ios.sh * Fix MSVC ARM32 and ARM64 compile * Split ARM32 and ARM64 recipes in GNUmakefile
* Clear unused varaible warning on PowerPCJeffrey Walton2019-10-141-1/+1
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* Fix missing _mm_roti_epi32 and _mm_roti_epi64 under GCC (GH #859)Jeffrey Walton2019-07-021-1/+3
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* Add missing XOP header for blake2b_simd.cpp (GH #859)Jeffrey Walton2019-07-021-0/+5
| | | | | | The Gentoo folks caught a bug at https://bugs.gentoo.org/689162. The 689162 bug uses -march=bdver1 -msse4.1 on a AMD Bulldozer machine. Investigating the issue we are missing the XOP header blake2b_simd.cpp. However, adding the XOP header is not enough for this particular config. Four source files fail to compile with the expected headers. We are waiting on the GCC folks to get back to us with a fix.
* Update commentsJeffrey Walton2019-05-281-1/+0
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* Use PowerPC unaligned loads and stores with Power8 (GH #825, PR #826)Jeffrey Walton2019-04-271-0/+1
| | | Use PowerPC unaligned loads and stores with Power8. Formerly we were using Power7 as the floor because the IBM POWER Architecture manuals said unaligned loads and stores were available. However, some compilers generate bad code for unaligned loads and stores using `-march=power7`, so bump to a known good.
* Cleanup headers after Microsoft ARM64 portJeffrey Walton2019-01-041-2/+0
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* Fix <arm_neon.h> include for ARM64 with MSVC compiler (GH #776)Jeffrey Walton2019-01-041-1/+2
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* Disable Altivec for BLAKE2s on AIX 7.1 and XLC 12.01 (GH #743)Jeffrey Walton2018-11-211-0/+8
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* Rewrite BLAKE2 classesJeffrey Walton2018-11-201-36/+39
| | | | | | The ParameterBlocks for BLAKE2 had undefined behavior. We relied on the compiler packing the bytes in the structure, then we used the first byte as the start of an array. This rewrite does things correctly. We don't memset the structure, and we don't treat the structure as a contiguous array.
* Rename PPC vector functions from VectorFunc to VecFuncJeffrey Walton2018-11-151-62/+62
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* Rename files with dashes to underscores (GH #736)Jeffrey Walton2018-11-101-0/+1220
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