[dev.link] all: merge branch 'master' into dev.linkdev.link

Clean merge.

Change-Id: Ia7b2808bc649790198d34c226a61d9e569084dc5

1 files changed, 13 insertions, 2 deletions

diff --git a/src/internal/cpu/cpu_s390x.go b/src/internal/cpu/cpu_s390x.go
index 526e074225..45d8ed27f0 100644
--- a/src/internal/cpu/cpu_s390x.go
+++ b/src/internal/cpu/cpu_s390x.go
@@ -6,6 +6,8 @@ package cpu
 
 const CacheLinePadSize = 256
 
+var HWCap uint
+
 // bitIsSet reports whether the bit at index is set. The bit index
 // is in big endian order, so bit index 0 is the leftmost bit.
 func bitIsSet(bits []uint64, index uint) bool {
@@ -95,8 +97,10 @@ const (
 	// vector facilities
 	vxe facility = 135 // vector-enhancements 1
 
-	// Note: vx and highgprs are excluded because they require
-	// kernel support and so must be fetched from HWCAP.
+	// Note: vx requires kernel support
+	// and so must be fetched from HWCAP.
+
+	hwcap_VX = 1 << 11 // vector facility
 )
 
 // facilityList contains the result of an STFLE call.
@@ -188,7 +192,14 @@ func doinit() {
 			S390X.HasEDDSA = kdsa.Has(eddsaVerifyEd25519, eddsaSignEd25519, eddsaVerifyEd448, eddsaSignEd448)
 		}
 	}
+
+	S390X.HasVX = isSet(HWCap, hwcap_VX)
+
 	if S390X.HasVX {
 		S390X.HasVXE = facilities.Has(vxe)
 	}
 }
+
+func isSet(hwc uint, value uint) bool {
+	return hwc&value != 0
+}