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| author | Sayed Adel <seiko@imavr.com> | 2021-01-05 06:45:05 +0000 |
|---|---|---|
| committer | Sayed Adel <seiko@imavr.com> | 2021-01-05 07:15:51 +0000 |
| commit | 172311808c0857465cd09e9f7d295bfcd0179b1e (patch) | |
| tree | d140d24be8bcc513def099cc4f3190b245dde5a2 | |
| parent | 0f63c5ef0e9789fd18a676a750c43d3d69211324 (diff) | |
| download | numpy-172311808c0857465cd09e9f7d295bfcd0179b1e.tar.gz | |
BLD: Add extra check for AVX512DQ mask conversions
| -rw-r--r-- | numpy/distutils/ccompiler_opt.py | 2 | ||||
| -rw-r--r-- | numpy/distutils/checks/extra_avx512dq_mask.c | 16 |
2 files changed, 17 insertions, 1 deletions
diff --git a/numpy/distutils/ccompiler_opt.py b/numpy/distutils/ccompiler_opt.py index 5fa17b2ee..e6c720399 100644 --- a/numpy/distutils/ccompiler_opt.py +++ b/numpy/distutils/ccompiler_opt.py @@ -259,7 +259,7 @@ class _Config: AVX512_SKX = dict( interest=42, implies="AVX512CD", group="AVX512VL AVX512BW AVX512DQ", detect="AVX512_SKX", implies_detect=False, - extra_checks="AVX512BW_MASK" + extra_checks="AVX512BW_MASK AVX512DQ_MASK" ), AVX512_CLX = dict( interest=43, implies="AVX512_SKX", group="AVX512VNNI", diff --git a/numpy/distutils/checks/extra_avx512dq_mask.c b/numpy/distutils/checks/extra_avx512dq_mask.c new file mode 100644 index 000000000..f0dc88bdd --- /dev/null +++ b/numpy/distutils/checks/extra_avx512dq_mask.c @@ -0,0 +1,16 @@ +#include <immintrin.h> +/** + * Test DQ mask operations due to: + * - MSVC has supported it since vs2019 see, + * https://developercommunity.visualstudio.com/content/problem/518298/missing-avx512bw-mask-intrinsics.html + * - Clang >= v8.0 + * - GCC >= v7.1 + */ +int main(void) +{ + __mmask8 m8 = _mm512_cmpeq_epi64_mask(_mm512_set1_epi64(1), _mm512_set1_epi64(1)); + m8 = _kor_mask8(m8, m8); + m8 = _kxor_mask8(m8, m8); + m8 = _cvtu32_mask8(_cvtmask8_u32(m8)); + return (int)_cvtmask8_u32(m8); +} |