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| author | David Abdurachmanov <david.abdurachmanov@gmail.com> | 2018-04-01 14:50:53 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2018-04-01 15:02:04 +0200 |
| commit | 718d9e866b8f49a6898d267ed45306c08410e86c (patch) | |
| tree | 8531ab268ae5bd6534e0e91aa3ebe61a6c8bcd7b /numpy | |
| parent | 0440fb1a5578643e526d254762eee70e4859fb5d (diff) | |
| download | numpy-718d9e866b8f49a6898d267ed45306c08410e86c.tar.gz | |
ENH: Add support for the 64-bit RISC-V architecture
RISC-V (pronounced "RISC Five") is an open source instruction set
architecture (ISA). The 64-bit version may run the Linux kernel and the
usual stack of applications on top of it, including Python.
This patch adds support for riscv64 to Numpy. With it the full testsuite
passes for both Python 2.7 and 3.6, with the only exception of
test_float (test_numeric.TestBoolCmp). See #8213 for details.
Closes: #8213
Diffstat (limited to 'numpy')
| -rw-r--r-- | numpy/core/include/numpy/npy_cpu.h | 3 | ||||
| -rw-r--r-- | numpy/core/include/numpy/npy_endian.h | 3 |
2 files changed, 5 insertions, 1 deletions
diff --git a/numpy/core/include/numpy/npy_cpu.h b/numpy/core/include/numpy/npy_cpu.h index 84653ea18..106ffa450 100644 --- a/numpy/core/include/numpy/npy_cpu.h +++ b/numpy/core/include/numpy/npy_cpu.h @@ -17,6 +17,7 @@ * NPY_CPU_SH_BE * NPY_CPU_ARCEL * NPY_CPU_ARCEB + * NPY_CPU_RISCV64 */ #ifndef _NPY_CPUARCH_H_ #define _NPY_CPUARCH_H_ @@ -82,6 +83,8 @@ #define NPY_CPU_ARCEL #elif defined(__arc__) && defined(__BIG_ENDIAN__) #define NPY_CPU_ARCEB +#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64 + #define NPY_CPU_RISCV64 #else #error Unknown CPU, please report this to numpy maintainers with \ information about your platform (OS, CPU and compiler) diff --git a/numpy/core/include/numpy/npy_endian.h b/numpy/core/include/numpy/npy_endian.h index 1a42121db..320b79160 100644 --- a/numpy/core/include/numpy/npy_endian.h +++ b/numpy/core/include/numpy/npy_endian.h @@ -46,7 +46,8 @@ || defined(NPY_CPU_SH_LE) \ || defined(NPY_CPU_MIPSEL) \ || defined(NPY_CPU_PPC64LE) \ - || defined(NPY_CPU_ARCEL) + || defined(NPY_CPU_ARCEL) \ + || defined(NPY_CPU_RISCV64) #define NPY_BYTE_ORDER NPY_LITTLE_ENDIAN #elif defined(NPY_CPU_PPC) \ || defined(NPY_CPU_SPARC) \ |