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authorTom Tan <lilotom@gmail.com>2021-10-25 14:07:44 -0700
committerGitHub <noreply@github.com>2021-10-25 15:07:44 -0600
commit7624b4ef3560114424abccec8db90385465e9b42 (patch)
tree5cfe091138ff2ed72d240b6b4dc4978754962d7c /numpy
parentf8b78400dae12a6748cb714d557297186ef04157 (diff)
downloadnumpy-7624b4ef3560114424abccec8db90385465e9b42.tar.gz
BUG: Don't pass /arch:SSE2 to MSVC when targeting x64 (#20190)
* Don't pass /arch:SSE2 to MSVC link targeting x64 * Fix test * Fix format * Fix one more test
Diffstat (limited to 'numpy')
-rw-r--r--numpy/distutils/ccompiler_opt.py4
-rw-r--r--numpy/distutils/tests/test_ccompiler_opt.py6
2 files changed, 6 insertions, 4 deletions
diff --git a/numpy/distutils/ccompiler_opt.py b/numpy/distutils/ccompiler_opt.py
index 8f1768f77..d7df386fe 100644
--- a/numpy/distutils/ccompiler_opt.py
+++ b/numpy/distutils/ccompiler_opt.py
@@ -418,8 +418,8 @@ class _Config:
AVX512_ICL = dict(flags="/Qx:ICELAKE-CLIENT")
)
if on_x86 and self.cc_is_msvc: return dict(
- SSE = dict(flags="/arch:SSE"),
- SSE2 = dict(flags="/arch:SSE2"),
+ SSE = dict(flags="/arch:SSE") if self.cc_on_x86 else {},
+ SSE2 = dict(flags="/arch:SSE2") if self.cc_on_x86 else {},
SSE3 = {},
SSSE3 = {},
SSE41 = {},
diff --git a/numpy/distutils/tests/test_ccompiler_opt.py b/numpy/distutils/tests/test_ccompiler_opt.py
index 9c54ed66b..1b27ab07c 100644
--- a/numpy/distutils/tests/test_ccompiler_opt.py
+++ b/numpy/distutils/tests/test_ccompiler_opt.py
@@ -434,7 +434,8 @@ class _Test_CCompilerOpt:
self.expect_flags(
"sse sse2 vsx vsx2 neon neon_fp16",
x86_gcc="-msse -msse2", x86_icc="-msse -msse2",
- x86_iccw="/arch:SSE2", x86_msvc="/arch:SSE2",
+ x86_iccw="/arch:SSE2",
+ x86_msvc="/arch:SSE2" if self.march() == "x86" else "",
ppc64_gcc= "-mcpu=power8",
ppc64_clang="-maltivec -mvsx -mpower8-vector",
armhf_gcc="-mfpu=neon-fp16 -mfp16-format=ieee",
@@ -636,7 +637,8 @@ class _Test_CCompilerOpt:
x86_gcc="avx512f avx2 sse42 sse41 sse2",
x86_icc="avx512f avx2 sse42 sse41 sse2",
x86_iccw="avx512f avx2 sse42 sse41 sse2",
- x86_msvc="avx512f avx2 sse2",
+ x86_msvc="avx512f avx2 sse2"
+ if self.march() == 'x86' else "avx512f avx2",
ppc64="vsx3 vsx2",
armhf="asimddp asimd neon_vfpv4 neon",
# neon, neon_vfpv4, asimd implies each other