diff options
author | Tien Fong Chee <tien.fong.chee@intel.com> | 2023-03-08 19:20:15 +0800 |
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committer | tienfong <tien.fong.chee@gmail.com> | 2023-03-20 11:03:15 +0800 |
commit | 61ae22e548ebda525d5216d107e45f20eca70537 (patch) | |
tree | 0e745b35fa0bf99661cd668ef81ee375b40003e7 /doc/README.socfpga | |
parent | 1dda7c081ee51d6c4b52d2ef773464b745fb9ec0 (diff) | |
download | u-boot-socfpga-socfpga_v2022.10.tar.gz |
HSD #15012965144: doc: README.socfpga: Add FPGA full reconfiguration flowHEADrel_socfpga_v2022.10_23.05.01_prrel_socfpga_v2022.10_23.04.02_prrel_socfpga_v2022.10_23.04.01_prQPDS23.1_REL_GSRD_PRsocfpga_v2022.10
Adding required steps of running proper FPGA full reconfiguration. These
steps are required to ensure all all outstanding traffic between MPFE to
bridge and FPGA to bridge are completed before FPGA configuration.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Diffstat (limited to 'doc/README.socfpga')
-rw-r--r-- | doc/README.socfpga | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/doc/README.socfpga b/doc/README.socfpga index 6d882b70c1..5bf23fe205 100644 --- a/doc/README.socfpga +++ b/doc/README.socfpga @@ -314,3 +314,26 @@ Table of Contents socfpga_agilex_atf_defconfig -> socfpga_agilex_defconfig socfpga_n5x_atf_defconfig -> socfpga_n5x_defconfig socfpga_stratix10_atf_defconfig -> socfpga_stratix10_defconfig + +10. FPGA full reconfig flow for SoC64 devices +--------------------------------------------------------------------- + Bridges should be disabled before running any FPGA reconfiguration, + this ensures that all outstanding traffic between MPFE to bridge and + FPGA to bridge are completed. + + Bridges should be enabled after FPGA is successfully programmed + and entered user mode. + + Legacy and official boot flow: + If you are running fpga load command in U-Boot console, you are required + to run below steps to gracefully shutdown the bridges before running FPGA + reconfiguration: + 1. bridge disable command + 2. fpga load command + 3. bridge enable command after FPGA is successfully programmed + + If you are running bootm to program FPGA with bitstream loading from + FIT, you are required to run below steps before running bootm command. + 1. bridge disable command (can be done in U-Boot script) + 2. bootm, the bridge would be enabled automaticaly once FPGA is + is successfully programmed. |